/*---------------------------------------------------------------------------
//
//	Copyright(C) SMIT Corporation, 2000-2010.
//
//  File	:	phydrv.h
//	Purpose	:	Phycical Driver(High Level / Low Level)
//	History :
//				2006-08-18 created by pmy.
//
---------------------------------------------------------------------------*/
#ifndef __PHYDRV_H
#define __PHYDRV_H

#include "sm_types.h"
#include "xmsg.h"

#ifdef __cplusplus
extern "C" {
#endif


/****************************************************************************
*
* Phycical High Level Driver
*
****************************************************************************/

// I/O REGISTER
#define	REG_DATA		0
#define	REG_COM			1
#define	REG_STA			2
#define	REG_SIZEL		3
#define	REG_SIZEM		4

#define GETREGNAME(registr) ((registr)==REG_DATA?"DATA_REG":((registr)==REG_COM?"CMD_REG":((registr)==REG_STA?"STA_REG":((registr)==REG_SIZEL?"SIZEL_REG":((registr)==REG_SIZEM?"SIZEM_REG":"UNKN_REG")))))

// DEFINE ERROR
#define	ERR_SEACH	0x01	//Card out(no detected module or host)
#define	ERR_TRAN	0x02	//Transfert(Read,Write,In,Out) Error
#define ERR_CIS		0x03	//wrong CIS
#define ERR_AGAIN	0x04	//Try again : No Data available or PSCAM is Busy

// Command Register
#define	HC		BIT0
#define	SW		BIT1
#define	SR		BIT2
#define	RS		BIT3

// Status Register
#define	RE		BIT0
#define	WE		BIT1
#define	FR		BIT6
#define	DA		BIT7

#ifdef _DEBUG
#define	PHYS_TIMEOUT		100 //100000 //100 // physical timeout (in ms) //pmy
#else
#define	PHYS_TIMEOUT		2000	// physical timeout (in ms)
#endif
#define	PHYS_DELAY			500 //1 //1000 // org 1	// physical delay(in ms)

// physical state
#define DRV_IDLE		1
#define DRV_CONNECT		2
#define	DRV_DISCONNECT	3

typedef struct //saved lpdu
{
	unsigned char*	m_next;					// point to the next saved LPDU
	unsigned short 	m_len;					// length of saved LPDU
	unsigned char 	m_pbLPDU[1];			// start of saved LPDU buffer
}SLPDU;

typedef struct
{
	unsigned short 	m_slotId;				// slot identifier
	unsigned short 	m_negoSize;				// physical buffer size
	short 			m_state;				// physical state
    SLPDU*			m_firstSLPDU;			// head of the linked list of received LPDUs
}drv_slot_t;

int PHYS_DRVOpen(void);
int PHYS_DRVClose(void);
int PHYS_DRVWrite(unsigned short slotId, unsigned char *pbLpdu, unsigned short lpduSize);
BOOL PHYS_DRVRead(xmsg_t* pXmsg);
unsigned char PHYS_Detect(int drvslotIndex);



/****************************************************************************
*
* Phycical Lowv Level Driver
*
****************************************************************************/

#define DRV_DEV		"physical"					  // Driver Device Name

#define DRV_MEMADDR	0							  // Base Memory Address
#define DRV_CISLEN	128 //1024						  // CIS size (enough ?)

// Special commands for DRV_Ioctl s
#define DRV_ADDR		1						  // Set I/O Base Address
#define DRV_READMEM		2						  // Read memory
#define DRV_WRITEMEM	3						  // Write memory
#define DRV_READIO		4						  // Read a I/O Register
#define DRV_WRITEIO		5						  // Write a I/O Register
#define DRV_TSIGNAL		6						  // Check a Signal
#define DRV_SSIGNAL		7						  // Set / Clear a Signal

#define GETDRVCMDNAME(cmd)			((cmd)==DRV_ADDR?"DRV_ADDR":((cmd)==DRV_READMEM?"DRV_READMEM":((cmd)==DRV_WRITEMEM?"DRV_WRITEMEM":((cmd)==DRV_READIO?"DRV_READIO":((cmd)==DRV_WRITEIO?"DRV_WRITEIO":((cmd)==DRV_TSIGNAL?"DRV_TSIGNAL":((cmd)==DRV_SSIGNAL?"DRV_SSIGNAL":"UNKN_TANSTAT")))))))

enum
{
	// Signal number for DRV_TSIGNAL command
	DRV_DETECT = 1,
	DRV_READY_BUSY,

	// Signal number for DRV_SSIGNAL command
	DRV_EMSTREAM,
	DRV_ENSLOT,
	DRV_RSTSLOT,
	DRV_IOMEM,
	DRV_SLOTSEL,
	
	// Signal number for DRV_TSIGNAL command, only for cibox to test host
	DRV_HOSTDA,	//host data ready
};
#define GETSIGNALNAME(task) ((task)==DRV_DETECT?"SIG_CARD_DETECT":	((task)==DRV_READY_BUSY?"SIG_READY_BUSY":((task)==DRV_EMSTREAM?"SIG_EMSTREAM":((task)==DRV_ENSLOT?"SIG_ENSLOT":((task)==DRV_RSTSLOT?"SIG_RSTSLOT":((task)==DRV_IOMEM?"SIG_IOMEM":((task)==DRV_SLOTSEL?"SIG_SLOTSEL":((task)==DRV_HOSTDA?"DRV_HOSTDA":"SIG_UNKN"))))))))

typedef struct
{
	unsigned short addr;			// I/O Base Address
}DRV_stAddr;  						// structure for DRV_ADDR

typedef struct
{
	unsigned short addr;			// address to read/write
	unsigned short m_len;			// number of bytes to read/write
	unsigned char *pbytes;			// pointer to bytes to read/write
	unsigned short rlen;			// number of bytes actually read/written
}DRV_stMem;  	 // structure for DRV_READMEM and DRV_WRITEMEM commands

typedef struct
{
	unsigned short registr;			// register address to read/write
	unsigned char *pvalue;			// pointer to the value to read/write
}DRV_stIO;  	 // structure for DRV_READIO and DRV_WRITEIO commands

typedef struct
{
	unsigned char sig;				// signal number
	unsigned char value;			// value(1 : signal present ; 0 missing)
}DRV_stSignal;		// structure for DRV_TSIGNAL command


typedef struct
{
	unsigned char pin;				// pin code
	unsigned char cs;				// value(1 : Set ; 0 clear)
}DRV_ssSignal;			// structure for DRV_SSIGNAL command

int DRV_Open(unsigned char *device_name);
int DRV_Write(int fd, unsigned short len, unsigned char *pbytes);
int DRV_Read(int fd, unsigned short len, unsigned char *pbytes);
int DRV_Close(int fd);

#ifdef __cplusplus
}
#endif

#endif	// !__PHYDRV_H
